Cross-Sectional Preparation of Structured Semiconductor Materials for TEM

Application Note for Leica EM RES102 - Industrial Manufacturing

August 17, 2016

Contact hole structures - sample preparation for TEM:
The vertical layer construction of a semiconductor structure should be examined as a TEM cross-sectional sample. In addition to the specific preparation of the desired structure, the widely different sputter rates and atomic weights of the individual components represent the level of difficulty involved with this preparation problem.

Preparation Conditions

Mechanical pre-preparation
The mechanical pre-preparation took place using the methods described in this chapter using a Ti grid. The individual steps are shown in Fig.1-3.
SEM images of the individual steps in the preparation with Ti grids:

Fig.1: Ti grid
Fig.2: Ti grid with embedded sample
Fig.3: milled sample

Double sided polishing:
Leica EM TXP:
Diamond foils: 15 μm, 9 μm, 6 μm, 3 μm, 1 μm and 0.5 μm at 2200 rpm until the final sample thickness of 30 μm was reached.

Ion Milling 

Sample holder:Quick-clamp-holder
Acceleration voltage:7 kV and 2.5 kV (final step)
Milling angle:4° (milling on both sides)
Sample movement:Rotation and oscillation (alternating)

 

 

The effects of the ion beam preparation are shown in Figures 4 to 9. As a result of the ion beam milling with sample rotation, multi-layer systems with different sputter rates lead to the formation of a wall. This can be moved away from the area of interest by the use of a flatter milling angle and sample oscillation.

Fig.4
Fig.6
Fig.5
Fig.7

SEM images of the individual steps of the ion beam preparation with a visible wall that has been moved out of the area of the structure that is of interest (Fig.4)

Fig.8
Fig.9

SEM images of the finished TEM sample with the electron-transparent area

Results

It was possible to carry out a target preparation of the structure of interest. The sample is electron-transparent over an area of approximately 200µm. All components can be irradiated to approximately the same extent, with the exception of the W plugs. If you wish to examine the grain structure of the W plugs and their boundary surfaces to other semiconductor structures, the sample must be re-thinned. As a consequence, this frequently causes the loss of the surrounding, more sputterable areas.

Fig.10
Fig.11

XTEM images of contact and conducting path structures (overview images)

Fig.12
Fig.13

XTEM images of the partially electron transparent W plugs

Fig.14

XTEM image of a layer - W plug boundary surface with eletron transparent W plug

 

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